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Intel-x86-System-Programming-Guide, Part 1,Chapter 3.3 PHYSICAL ADDRESS SPACE
阅读量:4125 次
发布时间:2019-05-25

本文共 1948 字,大约阅读时间需要 6 分钟。

声明:原文版权归属Intel®,这里仅作学习使用

来源:Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide, Part 1

 


 

Chapter 3.3 PHYSICAL ADDRESS SPACE 物理地址空间

In protected mode, the IA-32 architecture provides a normal physical address space of 4 GBytes (232 bytes). This is the address space that the processor can address on its address bus. This address space is flat (unsegmented), with addresses ranging continuously from 0 to FFFFFFFFH. This physical address space can be mapped to read-write memory, read-only memory, and memory mapped I/O. The memory mapping facilities described in this chapter can be used to divide this physical memory up into segments and/or pages.

 

在保护模式下,IA-32架构提供了4GB(232)的物理地址空间,这是处理器在自己的地址总线上能寻址的地址空间。这个地址空间是平坦的,地址连续从0到FFFFFFFFH。物理地址空间可以映射为读写内存、只读内存、内存映射I/O。

Starting with the Pentium Pro processor, the IA-32 architecture also supports an extension of the physical address space to 236 bytes (64 GBytes); with a maximum physical address of FFFFFFFFFH. This extension is invoked in either of two ways:

•Using the physical address extension (PAE) flag, located in bit 5 of control register CR4.
•Using the 36-bit page size extension (PSE-36) feature (introduced in the Pentium III processors).

 

PAE或者PSE可以扩张到64GB内存

See Section 3.8, “36-Bit Physical Addressing Using the PAE Paging Mechanism” and Section 3.9, “36-Bit Physical Addressing Using the PSE-36 Paging Mechanism” for more information about 36-bit physical addressing.

 

3.3.1 Intel® 64 Processors and Physical Address Space

On processors that support Intel 64 architecture (CPUID.80000001:EDX[29] = 1), the size of the physical address range is implementation-specific and indicated by CPUID.80000008H:EAX[bits 7-0].

For the format of information returned in EAX, see “CPUID—CPU Identification” in Chapter 3 of the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 2A. See also: Section 3.8.1, “Enhanced Legacy PAE Paging.”

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